EC6009Advanced Computer Architecture - FDTP - Anna University
The department of Electronics Communication Engineering, Anna University, Chennai 600 025 has organized the FDTP “Advanced Computer Architecture”and sponsored by Centre for Faculty Development,CEG Campus,Anna University,Chennai- on 22nd May to 28th May 2017.
Aim :
To provide an excellent opportunity for young faculty members to interact with senior expert academicians, to enrich their knowledge in the subject and familiarize them with effective teaching-learning practices.Topics :
Scalable architecture for delivering sustained performance.Instruction Level Parallelism, Data Level Parallelism and Thread Level Parallelism.
Technological bases which includes RISC,CISC, Super scalar, Super pipe-lining and VLIW architectures.
Operational principles of bus, cache and shared memory organization.
Registration Details :
Interested persons are requested to fill up the application form in the prescribed format and send the scanned copy to the Coordinator by e-mail (srid.cegece@gmail.com) on or before 15th May 2017.Note :
No Registration fees.Registration is on First Come – First Served basis only
Only limited number of seats (25) are available.
Priority will be given to young faculty based on eligibility criteria.
Selected candidates will be intimated by e-mail.
No TA/DA will be paid.
No accommodation will be provided.
Dates to remember :
Last date for submission of application : 15/05/2017
Intimation of selection (by mail) : 16/05/2017
Confirmation of participation (by mail) : 17/05/2017
Training Program : 22/05/2017 to 28/05/2017
Communication Detail :
Dr. D. SridharanDr. Ewins Pon Pushpa
Co-ordinators,
FDTP0n “Advanced Computer Architecture”,
Department of ECE,
College of Engineering, Guindy Campus
Anna University,
Chennai - 600 025
Phone : 22358220/8920
Email:srid.cegece@gmail.com
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